Titan Serial FPDP XMC
Quad Channel – Vita 17.1
• Radar data recording and simulation
• Missile test
• High-speed sensor data capture
• Geological survey and seismic
• Physics research
• High performance
• Low power
• Air-cooled and conduction-cooled
The Titan Serial FPDP XMC is a flexible platform implementing a quad-channel VITA 17.1-2003 sFPDP receive and transmits engine for high-performance image processing, SIGINT/COMINT, radar processing, software-defined radio, sensor data capture, etc.
The sFPDP XMC has a low power Xilinx Virtex 6 LX75T FPGA, with up to four individually configurable sFPDP links, software configurable for 1.0625, 2.125, 2.5, 3.125 and 4.25Gbaud link speed.
If multiple boards are to be synchronized, an external 10MHz reference clock source can be used in combination with the trigger in/out. In master mode, up to four 10MHz reference outputs are available for synchronization of external devices. There is 2GB DDR3 SDRAM onboard for ultra-deep FIFOs in applications where high elasticity is required. The PCI Express x8 host interface utilizes the Xilinx hard IP interface for high bandwidth data directly to CPU memory.
The sFPDP XMC is available in both air-cooled and conduction-cooled variants. The board may be fitted with standard front panel LC connectors or recessed rugged LC connectors for easy optical cabling in conduction-cooled environments with no front panel connections. Alternatively, the high-speed serial interfaces can be routed through the P16 rear I/O for backplane communication.
The board is delivered with drivers for Linux hosts. An optional PCI Express card edge adapter offers easy integration in standard desktop systems for non-rugged applications and SW development.
Galleon Embedded Computing’s quality management system is certified to Aerospace Standard AS/EN 9100 and ISO 9001.
• 4 channel serial FPDP
• VITA 17.1 compliant
• 1.0625, 2.125, 2.5, 3.125 and 4.25Gbaud supported
• Xilinx Virtex-6 FPGA
• 2GB SDRAM
• Trigger in/out
• PCIe x8 host interface
• Internal/external 10MHz reference clock
• 4x 10MHz reference clock outputs
• Optical duplex LC or rear I/O sFPDP interfaces
• C++ API
• Linux drivers and SDK
FPGA & Memory
• Xilinx Virtex 6 LX75T
• 2GB SDRAM
High-Speed Serial Interfaces
• 4x channels
• 1.0625, 2.125, 2.5, 3.125 and 4.25 Gbit link speeds supported by default clock synthesizer configuration
• 850nm MM or 1310nm SM transceivers
• Optional recessed LC connectors for easy internal cabling in conduction-cooled systems without front panel connections
• Duplex LC optical connectors
• Optional rear I/O interface
• 256Mbit (stores up to 4 images)
• Trigger in/out
• PCI Express x8
• 4x High-speed serial TX
• 4x High-speed serial RX
• 16x GPIO (LVCMOS)
• 10MHz on-board oscillator
• 10MHz external reference clock input
• 4x 10MHz clock output
• Clock synthesizer generating four clocks in the range from 4 to 710MHz
• -40°C to +75°C rugged air-cooled
• -40°C to +85°C rugged conduction-cooled
• Conformal coating on all models
• Up to 100%, condensing
• Linux drivers
* Virtually any link speed up to 4.25Gbit can be supported using custom programming of the clock synthesizer, contact factory for custom options.