Titan sFPDP XMC
Quad Channel – Up to 10.3125 Gbps
Applications | Benefits |
---|---|
‣ Missile testing | ‣ High performance |
‣ Radar development and data recording | ‣ Air-cooled and conduction-cooled |
‣ High speed sensor data capture | ‣ Low power |
‣ Geological survey and seismic | |
‣ Physics research |
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Overview
The Galleon sFPDP XMC is a versatile platform for various applications such as high-performance image processing, radar processing, and sensor data capture. It is powered by the low-energy Intel® Arria® 10 FPGA, which can support up to four individually adjustable sFPDP links. These links can be adjusted to speeds ranging from 1.0625 to 10.3125 Gbps.
The sFPDP XMC is equipped with 2GB SDRAM, allowing for deep FIFOs in applications that require high elasticity. The PCI Express x8 host interface uses the Arria hard IP interface to deliver high-bandwidth data directly to CPU memory. The board is available in both air-cooled and conduction-cooled versions, and it can be fitted with standard rugged front panel LC connectors or recessed rugged LC connectors. Alternatively, the high-speed serial interfaces can be routed through the P16 rear I/O for backplane communication. Linux drivers are provided with the board.
Galleon Embedded Computing’s quality management system boasts certification to Aerospace Standard AS/EN 9100 and ISO 9001.
Specifications
FPGA & Memory
- Intel® Arria® 10
- 2GB SDRAM
High Speed Serial Interfaces
- 4x channels
- Per channel configurable sFPDP link speed:
- Models with 5Gbps transceivers: 1.0625, 2.125, 2.5, 3.125, 4.25, 5 Gbaud
- Models with 10Gbps 6.25, 8.5, 10 and 10.3125 Gbaud
- 850nm MM or 1310nm SM transceivers
- Optional recessed LC connectors for easy internal cabling in conduction cooled systems without front panel connections
- Duplex LC optical connector
- Optional rear I/O interface (at restricted link speeds)
Configuration FLASH
- Software upgradable FPGA configuration
XMC Interface
- PCI Express x8
- 4ch sFPDP (option – restricted link speeds)
- XMC2 (VITA 61) connectors standard (contact factory XMC/VITA42 version)
Timing
- Programmable clock synthesizer non-standard link speeds
- Multi-card timing sync. function**
Operating Temperature
- -40°C to +75°C rugged air cooled
- -40°C to +85°C rugged conduction cooled
- Conformal coating on all models
Humidity
- Up to 100%, condensing
Software
-
- Linux drivers
* Virtually any link speed up to 10.3125 Gbps can be supported using custom programming of the clock synthesizer, contact factory for custom options.
**Contact factory for custom options
Key Features
Key Features
• 4 channel serial FPDP
• VITA 17.1 & 17.3 compliant
• 2.125, 2.5, 3.125, 4.25, 5, 6.25, 8.5, 10, and 10.3125 Gbps supported
• Intel Arria 10 FPGA
• 2GB SDRAM
• High resolution timestamping
• PCIe x8 host interface
• Timer synchronization between multiple boards
• 4x micro-coax IO for timer synchronization
• Optical duplex LC or rear I/O sFPDP interfaces
• C++ API
• Linux drivers and SDK